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GCC instruction scheduling is retarded PDF Print E-mail
Written by Dave Thorup   
Tuesday, 28 March 2006

OK, GCC instruction scheduling and register usage is retarded. I've got a nice big, complex Altivec function that I've been optimizing and the biggest problem I've had with it is running out of registers. I was using around 31-32 and GCC was spilling registers left and right. So I've been reducing the register usage to try and fix this. I can count the maximum number of registers that should be used and it's well under 32, it's more like 23-25. And a good compiler should be able to reduce that number even further. But even after reducing the number of registers used to 23-25 GCC was still spilling registers like crazy.

So I happened to see a post by Sanjay Patel on the Altivec mailing list about some GCC compiler options that you can use for hand-tuned code:

  1. -fno-schedule-insns -fno-schedule-insns2
 

I found a PPCZone forum thread about these options as well. Sure enough if I use these options then I don't have any problems with registers spilling onto the stack. So why is GCC so retarded when these options aren't used!? The problem is that these options basically disable any optimized instruction scheduling that GCC might try to do. For hand-tuned Altivec code this is fine, but for generic scalar code it's usually bad. Since the file that my Altivec code is in has both generic scalar code & hand-tuned Altivec code I'm not sure if using these compiler options is a good thing overall.

Why can't GCC just do the right thing in the first place and not be so damn retarded!?

PS - I should mention that I'm still using GCC 3.3. =( I'm hoping to be able to start using GCC 4 soon so I'll have to see if it's any less retarded than GCC 3.3.


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